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WEDNESDAY, June 9, 2004, 10:30 AM - 12:00 PM | Room: 6B
TOPIC AREA:  SYSTEM-LEVEL DESIGN AND VERIFICATION

   SESSION 22
  Panel: System-Level Design: Six Success Stories in Search of an Industry
  Chair: Grant E. Martin - Tensilica, Inc., Santa Clara, CA
  Organizers: Francine Bacchini, Rita Glover

  System-level design is being touted as the holy grail that the electronics industry has long sought, but most offers have been disappointing because they seldom deliver results. Many designers are fed up with the "Blah, Blah" on system-level design as they are waiting for design facts.

Why? It seems that major breakthroughs are happening thanks to the adoption of a standard direction for modeling design at higher than RTL level. These models are called TLM and new languages are being adopted (SystemC, SystemVerilog). The emergence of new standards may reshape completely the way design industry is organized.

This panel will bring six speakers relating their success stories about design, starting at the system-level. The format is an educational Panel aimed at informing DAC attendees of the challenges (difficulties and pitfalls) and opportunities (sizable benefits and lessons learned from these experiences).

    22.1   System Level Design: Six Success Stories in Search of an Industry
  Speaker(s): Pierre Paulin - STMicroelectronics, Ottawa, ON, Canada
Arie Bernstein - Intel Corp., Haifa, Israel
Reinaldo A. Bergamaschi - IBM Corp., Yorktown Heights, NY
Ramesh Chandra - QUALCOMM, Inc, San Diego, CA
Raj Pawate - Texas Instruments, Bangalore, India
Mohamed Ben-Romdhane - Conexant, Newport Beach, CA